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SN74AUP1G125DCKR 货源充足,正在供货 ... |
The SN74AUP1G125 bus buffer gate is a single line driver with a 3-state
output. The output is disabled when the output-enable (OE) input is high.
This device has the input-disable feature, which allows floating input signals.To ensure the high-impedance state during power up or power... |
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芯片信息 |
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型号 |
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SN74AUP1G125DCKR |
品牌 |
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TI |
PDF |
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查看PDF文件 |
库存数量 |
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16673 |
特性 |
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Minqty |
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SOT-SC70 (DCK) | 5 |
包装封装 |
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3,000 | LARGE T&R |
工作温度 |
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-40 to 85 |
描述 |
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The SN74AUP1G125 bus buffer gate is a single line driver with a 3-state
output. The output is disabled when the output-enable (OE) input is high.
This device has the input-disable feature, which allows floating input signals.To ensure the high-impedance state during power up or power down,
OE must be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking capability of the driver. |
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上一篇 |
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SN74AUP1G14YFPR |
Texas Instruments |
The AUP family is TI |
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Next article |
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SN74HCS02PWR |
Texas Instruments |
此器件包含四个具有施密特触发输入的独立双... |
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